Delay circuit and method for use in reducing relay switching
US11183994B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 10, 2020 |
| Grant date | Nov 23, 2021 |
| Priority date | — |
| Expiry date | Dec 10, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00163
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A delay circuit is disclosed. The delay circuit is coupled to a relay switch that is contained in a power conversion device. When an electronic device having the power conversion device is operated in a sleep mode, the delay circuit applies a time delaying process to a power signal that is transmitted to the relay switch, such that a rising time of each of switch-on pulses contained by the power signal is delayed for a specific time. The specific time is set to be longer than a pulse width of each of power-on pulses contained by a power switching signal of the power conversion device. As such, when the electronic device is operated in the sleep mode, switching actions of the relay switch is properly controlled, thereby making the power conversion device not produce noise. Moreover, the service life of the relay unit is also extended.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.