Patent · US Active

Soft-input soft-output decoding of block codes

US11184035B2 · kind B2 · utility

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1References
20Claims
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Assignee

Inventors

Key dates

Filing dateMar 11, 2020
Grant dateNov 23, 2021
Priority date
Expiry dateMar 11, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M13/6502
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A decoder decodes a soft information input vector represented by an input vector that is binary and that is constructed from the soft information input vector. The decoder stores even parity error vectors that are binary and odd parity error vectors that are binary for L least reliable bits (LRBs) of the input vector. The decoder computes a parity check of the input vector, and selects as error vectors either the even parity error vectors or the odd parity error vectors based at least in part on the parity check. The decoder hard decodes test vectors, representing respective sums of the input vector and respective ones of the error vectors, based on the L LRBs, to produce codewords that are binary for corresponding ones of the test vectors, and metrics associated with the codewords. The decoder updates the soft information input vector based on the codewords and the metrics.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.