Cache coherency for host-device systems
US11188471B2 · kind B2 · utility
1Cited by
14References
22Claims
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Key dates
| Filing date | Apr 3, 2020 |
| Grant date | Nov 30, 2021 |
| Priority date | — |
| Expiry date | Apr 3, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/502
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cache coherency mode includes: in response to a read request from a device in the host-device system for an instance of the shared data, sending the instance of the shared data from the host device to that device; and, in response to write request from a device, storing data associated with the write request in the cache of the host device. Shared data is pinned in the cache of the host device, and is not cached in any of the other devices in the host-device system. Because there is only one cached copy of the shared data in the host-device system, the devices in that system are cache coherent.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.