Balanced caching between a cache and a non-volatile memory based on rates corresponding to the cache and the non-volatile memory
US11188474B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 19, 2018 |
| Grant date | Nov 30, 2021 |
| Priority date | — |
| Expiry date | Aug 31, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7203
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatuses, systems, methods, and computer program products are disclosed for balanced caching. An input circuit receives a request for data of non-volatile storage. A balancing circuit determines whether to execute a request by directly communicating with one or more of a cache and a non-volatile storage based on a first rate corresponding to the cache and a second rate corresponding to the non-volatile storage. A data access circuit executes a request based on a determination made by a balancing circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.