Method for defending control flow attacks based on XOR gates
US11188654B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2019 |
| Grant date | Nov 30, 2021 |
| Priority date | — |
| Expiry date | May 26, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L63/1441
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The disclosure discloses a method for defending control flow attacks. When a data processor gives a response to an interrupt routine, a return address and a binary key are input to an encryption circuit to be encrypted to obtain an encrypted return address, and the obtained encrypted return address is synchronously written into a stack of the data processor and an built-in register bank; when the response given to the interrupt routine by the data processor is finished, the encrypted return address is read from the tack of the data processor and the built-in register bank; afterwards, the two encrypted return addresses are decrypted by first and second decryption circuits respectively to obtain two decrypted return addresses; and the two decrypted return addresses are compared to draw a conclusion whether the data process suffers from a control flow attack, and data processor determines to continue or terminate the routine accordingly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.