Shift register unit, driving method thereof, gate driving circuit and display device
US11189243B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 25, 2020 |
| Grant date | Nov 30, 2021 |
| Priority date | — |
| Expiry date | Mar 25, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register unit, a driving method thereof, a gate driving circuit, and a display device. The shift register unit comprises an input circuit, a control circuit, a reset circuit, an output circuit and a first capacitor, where the input circuit provides a signal from an input signal terminal to a first node; the control circuit controls signals from the first node and a second node; the reset circuit provides a signal from a reference signal terminal to the first node; the output circuit provides a signal from a clock signal terminal to a signal output terminal, and provides the signal from the reference signal terminal to the signal output terminal; and the first capacitor is coupled between the clock signal terminal and the second node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.