Semiconductor device and apparatus of manufacturing the same
US11189633B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 2019 |
| Grant date | Nov 30, 2021 |
| Priority date | — |
| Expiry date | Dec 2, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A semiconductor device includes gate electrodes and interlayer insulating layers that are alternately stacked on a substrate, channel structures spaced apart from each other in a first direction and extending vertically through the gate electrodes and the interlayer insulating layers to the substrate, and a first separation region extending vertically through the gate electrodes and the interlayer insulating layers. Each gate electrode includes a first conductive layer and a second conductive layer, the first conductive layer disposed between the second conductive layer and each of two adjacent interlayer insulating layers. In a first region, between an outermost channel structure and the first separation region, of each gate electrode, the first conductive layer has a decreasing thickness toward the first separation region and the second conductive layer has an increasing thickness toward the first separation region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.