Array substrate and manufacturing method therefor, and display device
US11189679B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2019 |
| Grant date | Nov 30, 2021 |
| Priority date | — |
| Expiry date | Dec 12, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/126
Abstract
An array substrate includes a base substrate and a plurality of pixel units disposed on a base substrate, and at least one pixel unit includes a plurality of thin film transistors, a first electrode, and a second electrode. The plurality of thin film transistors include at least one first thin film transistor including a first active pattern, a first gate, a first source and a first drain. The first electrode is disposed in a same layer as the first active pattern, the first electrode is coupled to the first drain, and the second electrode is disposed in a same layer as the first gate. Orthographic projections of any two in a group consisting of the first electrode, the second electrode, and the first drain on the base substrate have an overlapping region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.