Configuring synchronization signal blocks having different power levels
US11191046B2 · kind B2 · utility
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19Claims
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Key dates
| Filing date | Jun 16, 2017 |
| Grant date | Nov 30, 2021 |
| Priority date | — |
| Expiry date | Jun 16, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L5/0048
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Apparatuses, methods, and systems are disclosed for synchronization signal block reception and synchronization signal block transmission. One apparatus (200) for synchronization signal block reception includes a receiver (212) that receives (402) multiple synchronization signal blocks. The multiple synchronization signal blocks have different power levels corresponding to at least two synchronization signal blocks of the multiple synchronization signal blocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.