Patent · US Active

Method for gracefully handling QAT hardware or CPU software failures by dynamically switching between QAT hardware and CPU software for data compression and decompression

US11194651B2 · kind B2 · utility

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21Claims
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Assignee

Inventors

Key dates

Filing dateOct 11, 2019
Grant dateDec 7, 2021
Priority date
Expiry dateFeb 4, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/1497
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method, apparatus, and system for handling a failure of a hardware cryptography/compression accelerator is disclosed. The operations comprise: detecting that a hardware cryptography/compression accelerator at a first data storage system has failed; determining one or more failed cryptography and/or compression operation tasks that were submitted to the hardware cryptography/compression accelerator but were not completed due to the failure of the hardware cryptography/compression accelerator; and performing a remedial operation in response to the hardware cryptography/compression accelerator failure to prevent a systemic failure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.