Network-on-chip topology generation
US11194950B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 21, 2020 |
| Grant date | Dec 7, 2021 |
| Priority date | — |
| Expiry date | Oct 21, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/109
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a computer-based method and system for synthesizing a NoC. Physical data, device data, bridge data and traffic data are determined based on an input specification for the NoC. A virtual channel (VC) is assigned to each traffic flow. A head of line (HoL) conflict graph (HCG) is constructed based on the traffic data and the VC assignments. The HGC is modified based on bridge data and the traffic data to generate a modified HCG. A plurality of traffic graphs (TGs) are constructed based on the physical data, the bridge data, the traffic data and the modified HCG. A candidate topology is generated for each TG, which includes the bridge ports, routers and connections. The candidate topologies are merged to create a merged candidate topology, and the routers within the merged candidate topology are merged to generate a final topology for the NoC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.