Impedance compensation along a channel of emitters
US11196230B2 · kind B2 · utility
1Cited by
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20Claims
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Key dates
| Filing date | Dec 12, 2018 |
| Grant date | Dec 7, 2021 |
| Priority date | — |
| Expiry date | Apr 18, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S5/2063
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An emitter array may comprise a plurality of emitters and a metallization layer to electrically connect the plurality of emitters. The metallization layer may have a first end and a second end. The plurality of emitters may include a first emitter and a second emitter. The first emitter may be located closer to the first end than the second emitter. The first emitter and the second emitter have differently sized structures to compensate for a first impedance of the metallization layer between the first end and the first emitter and a second impedance between the first end and the second emitter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.