Time synchronization device and time synchronization method
US11196499B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2019 |
| Grant date | Dec 7, 2021 |
| Priority date | — |
| Expiry date | Mar 4, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0641
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
[Problem] It is possible to improve the quality of time information by suppressing a jump in time which arises when switching a transfer path in a BC apparatus to which transfer paths of time information of at least 2 systems are connected to an input side.[Solution] A time synchronization apparatus 20 is mounted on a BC apparatus 12c in which two systems of at least a 0-system route (0-system) and a 1-system route (1-system) are connected to an input side, and includes a time correction value holding unit 26 configured to hold a 0-system correction value in which a time error resulting from delay of UTC due to performance inherent to the BC apparatus is the same value as a time error accumulated on the 0-system side and a 1-system correction value in which the time error is the same value as a time error accumulated on the 1-system side. Further, a failure restoration detection unit 23 configured to detect a failure in the 0-system or the 1-system, a time calculation unit 24 configured to perform correction by subtracting a 1-system correction value relating to a normal 1-system from UTC having time error accumulated on the normal 1-system side, when a failure in the 0-system is d…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.