Architecture agnostic replay verfication
US11200147B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 19, 2019 |
| Grant date | Dec 14, 2021 |
| Priority date | — |
| Expiry date | Jan 26, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2009/45591
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to aspects of the disclosure a method is provided, comprising: generating a live execution trace log corresponding to a live execution of a computer program, the live execution being performed by using both hardware emulation and hardware acceleration; generating a first trace entry corresponding to a replay execution of the computer program, the replay execution being performed by using hardware emulation without hardware acceleration, the replay execution being performed based on a set of events that are recorded during the live execution of the computer program; detecting whether the first trace entry is valid based on the live execution trace log; and in response to detecting that the first trace entry is not valid, transitioning into a safe state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.