Cache retention data management
US11200177B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 19, 2016 |
| Grant date | Dec 14, 2021 |
| Priority date | — |
| Expiry date | Sep 22, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1041
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system (2) incorporates a first exclusive cache memory (8, 10) and a second exclusive cache memory (14). A snoop filter (18) located together with the second exclusive cache memory on one side of the communication interface (12) serves to track entries within the first exclusive cache memory. The snoop filter includes retention data storage circuitry to store retention data for controlling retention of cache entries within the second exclusive cache memory. Retention data transfer circuitry (20) serves to transfer the retention data to and from the retention data storage circuitry within the snoop filter and the second cache memory as the cache entries concerned are transferred between the second exclusive cache memory and the first exclusive cache memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.