Non-volatile memory device and memory system including the same and program method thereof
US11200955B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 6, 2020 |
| Grant date | Dec 14, 2021 |
| Priority date | — |
| Expiry date | Jan 6, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/35
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A three-dimensional (3D) nonvolatile memory device includes a cell string. The cell string includes a pillar structure comprising a ground selection transistor, a plurality of memory cells, and a string selection transistor stacked vertically over a substrate. The memory cells comprise a first cell group and a second cell group stacked on the first cell group, and a horizontal width of at least a portion of the pillar structure decreases in a depth direction towards the substrate. A method of programming the memory device includes initializing a channel of a memory cell of the first cell group of the cell string through the ground selection transistor of the pillar structure, and then applying a program voltage to the memory cell of the pillar structure of the cell string.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.