Array substrate, display panel and display device
US11201173B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 25, 2019 |
| Grant date | Dec 14, 2021 |
| Priority date | — |
| Expiry date | Jun 25, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2201/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided are an array substrate, a display panel and a display device. The array substrate includes a display region and a peripheral region. The peripheral region includes a chip-on-film bonding region, and the peripheral region has a recessed structure configured to fill a bonding material. The recessed structure is between the chip-on-film bonding region and a lateral side of the array substrate. The chip-on-film bonding region is between the display region and the lateral side. By disposing a recessed structure configured to fill the bonding material in the peripheral region, a gap is difficult to occur between the chip-on-film in the chip-on-film bonding region and the array substrate, preventing entry of water vapor to cause corrosion of lead wires and short circuits of lead wires. The defect ratio of the array substrate, the display panel, and the display device is reduced, and the product quality is improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.