Multi-level inverter including at least four switches and at least four resistors
US11201564B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2020 |
| Grant date | Dec 14, 2021 |
| Priority date | — |
| Expiry date | Oct 12, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/53871
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure disclose a multi-level inverter, which belongs to the field of power electronics. The multi-level inverter includes a main topology, at least four resistors, a switch, and a controller. The main topology includes a power supply, a flying capacitor, and at least four semiconductor switches. The flying capacitor is electrically connected to the power supply. The controller is configured to: before the main topology works, control the switch to be closed, and when detecting that charging the flying capacitor is completed, control the switch to be open. The multi-level inverter provided in the present disclosure can prevent a semiconductor switch from being damaged.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.