Bus-off attack prevention circuit
US11201878B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 3, 2019 |
| Grant date | Dec 14, 2021 |
| Priority date | — |
| Expiry date | Feb 19, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2463/146
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Various systems and methods for bus-off attack detection are described herein. An electronic device for bus-off attack detection and prevention includes bus-off prevention circuitry coupled to a protected node on a bus, the bus-off prevention circuitry to: detect a transmitted message from the protected node to the bus; detect a bit mismatch of the transmitted message on the bus; suspend further transmissions from the protected node while the bus is analyzed; determine whether the bit mismatch represents a bus fault or an active attack against the protected node; and signal the protected node indicating whether a fault has occurred.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.