Patent · US Active

NVM endurance group controller using shared resource architecture

US11204833B1 · kind B1 · utility

4Cited by
4References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 19, 2020
Grant dateDec 21, 2021
Priority date
Expiry dateJun 19, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/3037
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method and apparatus for allocation of back-end (BE) logic resources between NVM sets. When a controller detects that an NVM set is in an idle state, it deallocates the BE logic from the originally assigned NVM set and provides the BE logic resource to another NVM set. An NVM set controller matrix maps interconnections between the BE logic resource and the new NVM set to enable use of the BE logic resource and the new NVM set. When a new command arrives for the originally assigned NVM set, the BE logic resources is re-allocated to the originally assigned NVM set.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.