Patent · US Active

System and method for application specific integrated circuit design

US11205029B2 · kind B2 · utility

0Cited by
14References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 4, 2019
Grant dateDec 21, 2021
Priority date
Expiry dateNov 4, 2039

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2119/12
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Systems and methods for application specific integrated circuit design using Chronos Links are disclosed. A Chronos Link is an ASIC on-chip and off-chip interconnect communication protocol that allows interfaces to transmit and receive information. The protocol may utilize messages or signals to indicate the availability and/or readiness of information to be exchanged between a producer and a consumer allowing the communication to be placed on hold and to be resumed seamlessly. A method includes inserting gaskets and channel repeaters connected to interfaces of multiple intellectual property (IP) blocks in order to replace traditional links with Chronos Links; performing simplified floorplanning; performing simplified placement; performing simplified clock tree synthesis (CTS) and routing; and performing simplified timing closure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.