Methods and systems for accessing a memory
US11210020B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | May 16, 2019 |
| Grant date | Dec 28, 2021 |
| Priority date | — |
| Expiry date | May 16, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/608
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory access technology applied to a computer system includes a first-level memory, a second-level memory, and a memory controller. The first-level memory is configured to cache data in the second-level memory. A plurality of access requests for accessing different memory blocks has a mapping relationship with a first cache line in the first-level memory, and the memory controller compares tags of the plurality of access requests with a tag of the first cache line in a centralized manner to determine whether the plurality of access requests hit the first-level memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.