Computing device and operation method thereof
US11210215B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2020 |
| Grant date | Dec 28, 2021 |
| Priority date | — |
| Expiry date | Jun 27, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computing device and an operation method thereof are provided. The computing device includes a plurality of memories and a processing circuit. The processing circuit is coupled to the memories. The processing circuit dynamically determines which of the plurality of memories to store at least one lookup table according to characteristics of the at least one lookup table. The processing circuit may then execute at least one algorithm by using the at least one lookup table.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.