Semiconductor device
US11211123B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2018 |
| Grant date | Dec 28, 2021 |
| Priority date | — |
| Expiry date | Nov 30, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/76
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A disclosed semiconductor device includes a memory cell with a first terminal, a second terminal, a memory element having a first resistance state and a second resistance state, and a nonlinear element, and a drive controller that performs a first operation that allows the memory element to be in the first resistance state, a second operation that allows the memory element to be in the second resistance state, a third operation in which the voltage of the first and second terminals is caused to be different from each other and a value of electric current flowing between the first terminal and the second terminal is caused to be limited to a first current value to determine the resistance state, and a fourth operation in which the current value is caused to be limited to a second current value. The drive controller performs the fourth operation after at least one of the first to third operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.