Fuse storage cell, storage array, and operation method of storage array
US11211135B2 · kind B2 · utility
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2References
20Claims
0Family size
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Key dates
| Filing date | Oct 1, 2020 |
| Grant date | Dec 28, 2021 |
| Priority date | — |
| Expiry date | Oct 1, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a fuse storage cell. The fuse storage cell includes a transistor and N fuse elements. The transistor includes a source, a drain, and a gate. Each fuse element of the N fuse elements includes a first terminal and a second terminal. The first terminal of the fuse element is electrically connected to the drain of the transistor, and the second terminal of the fuse is configured for inputting a read voltage or a programming voltage. N is a positive integer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.