Transistor and manufacturing method thereof, transistor device, display substrate and apparatus
US11211502B2 · kind B2 · utility
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1References
18Claims
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Key dates
| Filing date | Jun 29, 2020 |
| Grant date | Dec 28, 2021 |
| Priority date | — |
| Expiry date | Jun 29, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
Abstract
Provided is a transistor, the transistor being located on a base and having an active layer, and the active layer of the transistor comprising a plurality of semiconductor patterns which are stacked, wherein the plurality of semiconductor patterns are electrically connected; and orthographic projections of any two of the semiconductor patterns on the base are different in shape. A method of manufacturing a transistor, a transistor device, and a display substrate and apparatus are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.