Technologies for accelerated hierarchical key caching in edge systems

US11212085B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Timothy Verrall · Pleasant Hill, US
• Thomas Willhalm · Sandhausen, DE
• Francesc Guim Bernat · Barcelona, ES
• Karthik Kumar · Chandler, US
• Ned M. Smith · Beaverton, US
• Rajesh Poornachandran · Portland, US
• Kapil Sood · Beaverton, US
• Tarun Viswanathan · Folsom, US
• John J. Browne · Limerick, IE
• Patrick G. Kutch · Tigard, US

Key dates

• Filing date: Mar 29, 2019
• Grant date: Dec 28, 2021
• Expiry date: Jan 20, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H04L9/0897
• WIPO field: Digital communication
• WIPO sector: Electrical engineering

Abstract

Technologies for accelerated key caching in an edge hierarchy include multiple edge appliance devices organized in tiers. An edge appliance device receives a request for a key, such as a private key. The edge appliance device determines whether the key is included in a local key cache and, if not, requests the key from an edge appliance device included in an inner tier of the edge hierarchy. The edge appliance device may request the key from an edge appliance device included in a peer tier of the edge hierarchy. The edge appliance device may activate per-tenant accelerated logic to identify one or more keys in the key cache for eviction. The edge appliance device may activate per-tenant accelerated logic to identify one or more keys for pre-fetching. Those functions of the edge appliance device may be performed by an accelerator such as an FPGA. Other embodiments are described and claimed.