High-speed random number generation method and device
US11216252B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 26, 2018 |
| Grant date | Jan 4, 2022 |
| Priority date | — |
| Expiry date | Sep 10, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/588
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a high-speed random number generation method and device, comprising an entropy source module and an entropy sampling module. The entropy source module is an autonomous Boolean network formed by digital logic gates, the network is formed by an XNOR gate and (N−1) XOR gates, wherein the value of N is equal to 3n (n is a positive integer), and the entropy source can generate chaotic signals having wide and flat frequency spectrum. The entropy sampling module of the present disclosure is formed by D flip flops used for sampling and quantizing the chaotic signals to generate random number sequences. The random number sequences generated by the present disclosure can pass test standards (NIST and Diehard statistic tests) of random number industry and have excellent random statistic characteristics. The random number generation method and device of the present disclosure are completely formed by the digital logic gates, the circuit structure is simple and is easy to be integrated, and without the need of a post processing algorithm or circuit required by a conventional random number generation device, the power consumption can be greatly reduced. The presen…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.