Multi-die and multi-core computing platform and booting method for the same
US11216282B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2020 |
| Grant date | Jan 4, 2022 |
| Priority date | — |
| Expiry date | Jul 30, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/362
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A booting technology for a multi-die and multi-core computing platform is shown. A storage device stores number 1 firmware code and number 0 firmware code. A master die is coupled to the storage device through a bus and accesses the number 1 firmware code from the storage device through the bus. A first slave die is also coupled to the storage device through the bus. However, instead of accessing the storage device for the number 1 firmware code, the first slave die monitors the bus and retrieves the number 1 firmware code, accessed by the master die, from the bus. The master die further accesses the number 0 firmware code from the storage device through the bus. The master die executes the number 0 firmware code to operate the master die and the first slave die to boot the system and start up the platform.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.