Patent · US Active

Multi-die and multi-core computing platform and booting method therefor

US11216284B2 · kind B2 · utility

2Cited by
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20Claims
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Key dates

Filing dateSep 29, 2020
Grant dateJan 4, 2022
Priority date
Expiry dateSep 29, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2213/0002
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A multi-die and multi-core computing platform in which multiple dies share the same storage device for firmware code storage is shown. After a slave die loads #1 firmware code from the storage device through a bus, the right to use the bus is released by the slave die and the slave die outputs a #0 enable signal to a master die. According to the #0 enable signal, the master die gains the right to use the bus. Through the bus, the master die loads #0 firmware code from the storage device. The slave die executes the #1 firmware code and the master die executes the #0 firmware code to initialize a link between the master and slave dies.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.