Patent · US Active

Translation circuitry for an interconnection in an active interposer of a semiconductor package

US11216397B2 · kind B2 · utility

2Cited by

4References

20Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Lai Guan Tang · Bayan Lepas, MY
Ankireddy Nalamalpu · Portland, US
Dheeraj Subbareddy · Santa Clara, US
Chee Hak Teh · Kampung Bukit Kechil, MY
MD Altaf Hossain · Portland, US

Key dates

Filing date	Dec 23, 2019
Grant date	Jan 4, 2022
Priority date	—
Expiry date	Dec 23, 2039

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Systems and method include one or more die coupled to an interposer. The interposer includes interconnection circuitry configured to electrically connect the one or more die together via the interposer. The interposer also includes translation circuitry configured to translate communications as they pass through the interposer. For instance, in the interposer, the translation circuitry translates communications, in the interposer, from a first protocol of a first die of the one or more die to a second protocol of a second die of the one or more die.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.