Shift register unit, driving method, gate driver on array and display device
US11217148B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 14, 2018 |
| Grant date | Jan 4, 2022 |
| Priority date | — |
| Expiry date | Dec 4, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register unit, a driving method, a gate driver on array and a display device. The shift register unit includes an input sub-circuit, an output sub-circuit, a pull-down control sub-circuit and a pull-down sub-circuit; the input sub-circuit is configured for inputting an input signal from an input signal terminal to a pull-up node under a control of a first clock signal; the output sub-circuit is configured for inputting a second clock signal to an output terminal under a control of a pull-up node; the pull-down control sub-circuit is configured for inputting the first clock signal to a pull-down node under a control of the first clock signal, and inputting a power supply signal to the pull-down no under the control of the pull-up node; the pull-down sub-circuit is configured for inputting the power supply signal to the output terminal under a control of the pull-down node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.