Semiconductor device structure and manufacturing method
US11217548B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2018 |
| Grant date | Jan 4, 2022 |
| Priority date | — |
| Expiry date | Dec 13, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/81203
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device structure and a manufacturing method are provided. The semiconductor device structure includes a semiconductor substrate and a dielectric layer over the semiconductor substrate. The semiconductor device structure also includes a conductive trace over the dielectric layer. The semiconductor device structure further includes a conductive feature over the conductive trace, and a width of the conductive feature is substantially equal to or larger than a maximum width of the conductive trace. In addition, the semiconductor device structure includes a conductive bump over the conductive feature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.