Ferroelectric memories
US11217661B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2020 |
| Grant date | Jan 4, 2022 |
| Priority date | — |
| Expiry date | Apr 7, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/684
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A ferroelectric memory is provided. The ferroelectric memory includes a substrate, a first conductive layer disposed on the substrate, a patterned oxide layer disposed on the first conductive layer and the substrate, exposing a part of the first conductive layer, a second conductive layer disposed on the exposed first conductive layer and the patterned oxide layer, an antiferroelectric layer disposed on the exposed first conductive layer and the second conductive layer, a ferroelectric layer disposed on the second conductive layer and located on the antiferroelectric layer, a conductive oxide layer disposed between the antiferroelectric layer, and a third conductive layer disposed on the conductive oxide layer and between the ferroelectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.