Silicon cavity backed radiator structure
US11217874B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 18, 2020 |
| Grant date | Jan 4, 2022 |
| Priority date | — |
| Expiry date | Mar 18, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01Q9/16
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One embodiment is an apparatus comprising a silicon-on-insulator (“SOI”) substrate comprising an insulating layer sandwiched in between a bottom silicon layer and a top silicon layer; a radiating element disposed on a top surface of the SOI substrate; and at least one cavity disposed in the SOI substrate surrounding the radiating element, wherein the at least one cavity extends from a bottom surface of the bottom silicon layer to a bottom surface of the insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.