Ultra-low Iq buck converter with switchable error amplifier
US11218076B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2019 |
| Grant date | Jan 4, 2022 |
| Priority date | — |
| Expiry date | Nov 6, 2039 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A switching converter circuit includes a hysteretic comparator with a reference voltage (VREF) node and a feedback node. The switching converter circuit also includes a switchable error amplifier circuit coupled to the feedback node of the hysteretic comparator. The switchable error amplifier circuit includes an error amplifier that is coupled to the feedback node during a power-save mode and that is decoupled from the feedback node during a deep power-save mode initiated in response to a duration of the power-save mode being greater than a time threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.