Mask plate, manufacturing method of patterned film layer and manufacturing method of thin film transistor
US11221555B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 22, 2018 |
| Grant date | Jan 11, 2022 |
| Priority date | — |
| Expiry date | Nov 12, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6757
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A mask plate, a method for manufacturing a patterned film layer and a manufacturing method of a thin film transistor are provided by the embodiments of the present disclosure. The mask plate includes: a first pattern and a second pattern; the first pattern includes a first sidewall, a second sidewall, a connecting portion connecting the first sidewall and the second sidewall, and an extension portion on a side of the connecting portion away from the first sidewall; the second pattern is between the first sidewall and the second sidewall; a slit is between the first pattern and the second pattern, and the slit is configured for diffraction. The positive photoresist is used, the extension portion of the mask plate makes that the pattern of the photoresist formed by the mask plate with the extension portion has a region corresponding to the extension portion and the “bolt effect” is avoided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.