Touch substrate, manufacturing method and display device
US11221717B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 4, 2019 |
| Grant date | Jan 11, 2022 |
| Priority date | — |
| Expiry date | Sep 4, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2203/04112
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A touch substrate includes a touch region provided with touch electrodes, and a peripheral region surrounding the touch region and provided with at least one line arranged at a same layer as the touch electrodes. The touch electrodes include a first touch electrode and a second touch electrode arranged at a periphery of the touch region at a same side. A sum of parasitic capacitances generated between the first touch electrode and the at least one line at an adjacent part of the peripheral region is a first total parasitic capacitance, a sum of parasitic capacitances generated between the second touch electrode and the at least one line at the adjacent part of the peripheral region is a second total parasitic capacitance, and an absolute value of a difference between the first total parasitic capacitance and the second total parasitic capacitance is smaller than or equal to a threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.