Semiconductor device including vertical bond pads
US11222865B2 · kind B2 · utility
1Cited by
1References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 12, 2020 |
| Grant date | Jan 11, 2022 |
| Priority date | — |
| Expiry date | May 12, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present technology relates to a semiconductor device including semiconductor dies formed with vertical die bond pads on an edge of the dies. During wafer fabrication, vertical bond pad blocks are formed in scribe lines of the wafer and electrically coupled to the die bond pads of the semiconductor dies. The vertical bond pad blocks are cut through during wafer dicing, thereby leaving large, vertically oriented pads exposed on a vertical edge of each semiconductor die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.