Pixel structure, array substrate and display device
US11222905B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 12, 2018 |
| Grant date | Jan 11, 2022 |
| Priority date | — |
| Expiry date | Jan 5, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/674
Abstract
Provided are a pixel structure, an array substrate and a display device. The pixel structure includes a first group of TFTs, a second group of TFTs and a pixel electrode. First group of TFTs and second group of TFTs each include at least two TFTs. Source electrodes of all TFTs in first group of TFTs are connected to a same data line, drain electrodes of all TFTs in first group of TFTs are connected to sources electrodes of all TFTs in second group of TFTs, drain electrodes of all TFTs in second group of TFTs are connected to pixel electrode, and gate electrodes of all TFTs in first group of TFTs and gate electrodes of all TFTs in second group of TFTs are connected to a same gate line. A problem that whole pixel cannot work normally caused by the breakage of area where the channel is formed is avoided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.