Inter-channel crosstalk and non-linearity reduction in double-sampled switched-capacitor delta-sigma data converters
US11223368B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 2, 2020 |
| Grant date | Jan 11, 2022 |
| Priority date | — |
| Expiry date | Oct 2, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/494
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A switched-capacitor delta-sigma data converter circuit includes compensation for voltage reference error that may cause non-linearity and inter-channel crosstalk. The circuit includes a voltage reference circuit, an integrator, a quantizer that quantizes the output of the integrator and a reference feedback switched-capacitor network that provides feedback charge quanta to the integrator that represents an output of the quantizer, so that the output of the quantizer, on average, represents an input signal provided to the integrator. In addition, a compensation switched-capacitor network is included for drawing dummy load charge quanta from the voltage reference output that is not provided to the integrator so that a total charge drawn from the voltage reference output when the reference feedback switched-capacitor network is coupled to the voltage reference output does not vary as the input voltage varies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.