Patent · US Active

Portable chip tester with integrated field programmable gate array

US11226372B2 · kind B2 · utility

1Cited by
9References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 9, 2019
Grant dateJan 18, 2022
Priority date
Expiry dateMar 25, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/318519
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

Aspects of the invention include systems and methods directed to a portable chip tester. A non-limiting example of a system includes a housing, a printed circuit board mounted on the housing, in which the printed circuit board includes a first interface operable to permit electrical communication between the printed circuit board and a device under test. The system further includes a mount operable to enable an electrical connection with an integrated circuit, in which the integrated circuit is operable to manage testing the device under test under a testing protocol. The system further includes a power supply and a software platform that includes a memory having computer readable instructions and one or more processors for executing the computer readable instructions. The computer readable instructions controlling the processors to perform operations including directing the integrated circuit to manage testing of the device under test pursuant to the testing protocol.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.