Mask plate, method for forming via-hole, method for forming display substrate, the display substrate, and display device
US11226550B2 · kind B2 · utility
0Cited by
1References
17Claims
0Family size
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Key dates
| Filing date | Jan 11, 2018 |
| Grant date | Jan 18, 2022 |
| Priority date | — |
| Expiry date | Dec 24, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present disclosure provides a mask plate, a method for forming a via-hole, a method for forming a display substrate, the display substrate, and a display device. The mask plate is configured to form the via-hole in a layer, and includes a transparent pattern for the formation of the via-hole. The transparent pattern includes one or more curved edge, so the via-hole formed using the mask plate is provided with one or more curved edges at its bottom.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.