Communication link recovery
US11226919B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 2020 |
| Grant date | Jan 18, 2022 |
| Priority date | — |
| Expiry date | Jun 23, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Communication links, such as peripheral component interconnect express (PCIe) links between two PCIe-compatible devices, can be checked during a boot process to determine whether those links were established and trained successfully. Firmware, such as Basic Input/Output System (BIOS), can be programmed to determine links for which there are PCIe devices, and determine whether those links were established with the correct values for one or more connection parameters (e.g., speed and width). If one or more of these links was not established with the correct parameter values, the BIOS can perform up to a maximum or threshold number of retrain attempts. If those retrain attempts are unsuccessful, the BIOS can attempt up to a maximum or threshold number of reboot attempts. If, after a maximum number of reboot actions, one or more links still have not been established and trained successfully, a remedial action can be taken.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.