Semiconductor memory device and method for fabricating the same
US11227870B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2020 |
| Grant date | Jan 18, 2022 |
| Priority date | — |
| Expiry date | Apr 2, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/693
Abstract
A semiconductor memory device includes a third insulating pattern and a first insulating pattern on a substrate, the third insulating pattern and the first insulating pattern being spaced apart from each other in a first direction that is perpendicular to the substrate such that a bottom surface of the third insulating pattern and a top surface of the first insulating pattern face each other, a gate electrode between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and including a first side extending between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and a second insulating pattern that protrudes from the first side of the gate electrode by a second width in a second direction, the second direction being different from the first direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.