Microstrip DC block
US11228077B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 15, 2020 |
| Grant date | Jan 18, 2022 |
| Priority date | — |
| Expiry date | Jun 15, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01P1/2039
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A microstrip DC block includes a first signal line having a first signal line end and a first centreline (C1); a second signal line having a second signal line end and a second centreline (C2); a first spur-line extending from the first signal line end towards the second signal line end; a first stepped impedance line extending from the first signal line end towards the second signal line end, wherein the first stepped impedance line is parallel to the first spur line; a second spur-line extending from the second signal line end towards the first signal line end; a second stepped impedance line extending from the second signal line end towards the first signal line end, wherein the second stepped impedance line is parallel to the second spur line, and wherein the second stepped impedance line is coupled to the first stepped impedance line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.