Patent · US Active

Bandwidth adjustability in an FMCW PLL system

US11228318B1 · kind B1 · utility

3Cited by
4References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 29, 2020
Grant dateJan 18, 2022
Priority date—
Expiry dateOct 29, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01S13/931
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Exemplary aspects of the present disclosure involve a system and related method of PLL circuitry in a chirp signaling FMCW system having a variable PLL bandwidth (BW). To adjust the BW, the PLL circuitry may provide for variable capacitance in the circuitry. This capacitance change may allow for a bandwidth for one slope, as used for the acquisition period. The capacitance may then be adjusted to allow for a different bandwidth for another slope which is used to reset the circuitry in preparation for another frequency sweep. Adjusting the PLL BW, via variable capacitance, may be used to mitigate phase noise which can adversely the PLL.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.