Peripheral power domains

US11231765B2 · kind B2 · utility

Assignee

• Nordic Semiconductor ASA · NO

Inventors

• Anders Nore · Trondheim, NO
• Joar Olai Rusten · Trondheim, NO
• Ronan Barzic · Trondheim, NO
• Vegard Endresen · Trondheim, NO
• Per-Carsten Skoglund · Melhus, NO

Key dates

• Filing date: Jun 26, 2019
• Grant date: Jan 25, 2022
• Expiry date: Jun 26, 2039

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02D10/00
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

An integrated-circuit device comprises first and second peripherals, connected to a processor via a bus system, a peripheral interconnect that is separate from the bus system, wake up logic, a configuration memory and a power controller. In response to a change of state, the first peripheral generates event signals that are output to the peripheral interconnect. The peripheral interconnect provides the event signal to the second peripheral, which initiates tasks in response. The first peripheral, second peripheral and the wake-up logic are in a first, second and third power domain respectively. The power controller provides power to the third power domain whenever the first or second power domain is powered up. The wake-up logic detects an event signal from the first peripheral and, if it determines that the second peripheral is configured to initiate a task in response, it instructs the power controller to power up the second peripheral.