Power amplifier linearization circuit and related apparatus
US11233485B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2020 |
| Grant date | Jan 25, 2022 |
| Priority date | — |
| Expiry date | Apr 11, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2201/3231
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power amplifier linearization circuit and related apparatus is provided. In examples disclosed herein, the power amplifier linearization circuit includes an analog pre-distortion (APD) circuit coupled to an input of a power amplifier. Notably, the power amplifier can exhibit linearity response deviation, namely linearity amplitude response deviation and linearity phase response deviation, when amplifying a radio frequency (RF) signal under a compression condition. As such, the APD circuit is configured to receive a control signal corresponding to the linearity response deviation and pre-process the RF signal based on the control signal before providing the RF signal to the power amplifier. As a result, it may be possible to reduce the linearity response deviation in the power amplifier, thus helping to improve linearity and RF performance of the power amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.