High-performance receiver architecture
US11233536B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2018 |
| Grant date | Jan 25, 2022 |
| Priority date | — |
| Expiry date | Mar 28, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0292
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A wireless communication device can include an antenna array configured to receive a plurality of radio frequency (RF) signals, RF circuitry, and digital baseband receive circuitry. The RF circuitry is configured to process the plurality of RF signals received via the antenna array to generate a single RF signal. The digital baseband receive circuitry is coupled to the RF circuitry and is configured to generate a downconverted signal based on the single RF signal, amplify the downconverted signal to generate an amplified downconverted signal, and convert the amplified downconverted signal to generate a digital output signal for processing by a wireless modem. The digital baseband receive circuitry further includes at least a first filtering system configured to filter the downconverted signal prior to amplification.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.